The DSCH program is a logic editor and simulator. DSCH is used to validate the architecture of the logic circuit before the microelectronics design is started. DSCH provides a user-friendly environment for hierarchical logic design, and fast simulation with delay analysis, which allows the design and validation of complex logic structures. Some techniques for low power design are described in the manual. DSCH also features the symbols, models and assembly support for 8051 and 16F84. DSCH also includes an SPICE extractor for schematics.

Schematic Design Entry

Pattern Simulator

8051 Model Simulation

8051 Assembly program

Features

		User-friendly environment for rapid design of logic circuits.
		Supports hierarchical logic design.
		Handles both conventional pattern-based logic simulation and intuitive on-screen mouse-driven simulation.
		Built-in extractor which generates a SPICE netlist from the schematic diagram (Compatible with PSPICETM and WinSpiceTM).
		Current and power consumption analysis.
		Generates a VERILOG description of the schematic for layout editor.
		Immediate access to symbol properties (Delay, fanout).
		Models and assembly support for 8051 and PIC 16F84 microcontrollers.
		Sub-micron, deep-submicron, nanoscale technology support Supported by huge symbol library.