Microwind 3.9
What’S new

Releasing our new 3.9 version with FinFET and nsFET (nano sheet FET) transistor support. Users can draw and simulate latest nsFET transistors and study the benefits associated with future circuit designing. Apart from this, the 3.9 version has many new and exciting features. Please find below the newly added features/functions:

Introduction of Nanosheet Field Effect Transistor (NSFET) with 3nm technology.
Improved layout structure for NSFET and FinFET, design
rules and visualization of transistors.
Addition of new 7nm, 5nm, 3nm rule files and setting up
path for future technologies.
Improved license management system for windows 11.
Supports for new Windows 11 operating system.
Integrated third party SPICE simulation control inbuilt now.
Routing space saving upto 20% with new compact router.
Multiple Verilog file compilation with layout position control.
Hide layers from palette, so that user can
dig inside the layout patterns.

Improved Verilog netlist restructuring
with options of gate and wire optimization.
Improved 3D viewer for more transistor support.
Addition of WinSpice interface for executing
spice file from DSCH.
Delay re-computation in DSCH when technology is changed.
Display of power results in DSCH are improved.
Improved DRC lister for locating of errors.

Option to take screenshot of
simulation results and 3d view.
Dump simulation results in CSV format
for statistical analysis.
Improvised cell compiler.
Improved and new Help file.
Improve drawing speed.
Enhanced navigational features.
Many improvements in software function & operation.

Ready to learn about CMOS