Introduction of Nanosheet Field Effect Transistor (NSFET) with 3nm technology.
Improved layout structure for NSFET and FinFET, design
rules and visualization of transistors.
Addition of new 7nm, 5nm, 3nm rule files and setting up
path for future technologies.
Improved license management system for windows 11.
Supports for new Windows 11 operating system.
Integrated third party SPICE simulation control inbuilt now.
Routing space saving upto 20% with new compact router.
Multiple Verilog file compilation with layout position control.
Hide layers from palette, so that user can
dig inside the layout patterns.

Option to take screenshot of
simulation results and 3d view.
Dump simulation results in CSV format
for statistical analysis.
Improvised cell compiler.
Improved and new Help file.
Improve drawing speed.
Enhanced navigational features.
Many improvements in software function & operation.